The present invention relates to data processing systems and more particularly to the addressing architecture associated therewith.
The so-called throughput of a data processing system depends upon many factors, including the efficiency of the addressing technique used. Such throughput is increased for example by minimizing operations required such as for example that resulting by using index registers in combination with one or more base address registers, thereby enabling addressing to various non-contiguous locations in memory without the need to change the base address each time a different such location needs to be addressed. Instead, the address in the base register may remain the same and the index value may be changed. This advantage may be provided for example during so-called memory stack push or pop operations. Such an addressing system becomes more efficient by providing a technique by which bytes and bits may be effectively addressed, in addition to the word addressing mode normally provided. By way of example, good byte manipulation capabilities facilitates the writing of compact computer programs which operate on character data. Such programs are especially common in a data communications environment. In addition, good bit manipulation facilities permit compact storage of "on-off" indicators and similar one bit quantities. They also make for more compact and efficient program where memory data must be accessed on a bit-by-bit basis. The result is less time and memory space for an application. Such bit addressing thus allows efficient testing, setting, resulting, complementing, etc., of the addressed bit.
It is accordingly a primary object of the present invention to provide a data processing system having an improved addressing architecture.